1. Technical Field
The present invention relates to a semiconductor integrated circuit, and more particularly, to a semiconductor apparatus with a plurality of stacked individual chips and a method of selecting an individual chip thereof.
2. Related Art
A semiconductor apparatus is designed to operate at a high speed and have a large data storage capacity.
These goals may be met by stacking individual chips in wafer levels and packaging the stacked chips as an individual product.
The individual chips in the stack are typically assigned addresses, and data is stored in the chips according to the assigned addresses.
When assigning addresses to the individual stacked chips, the values of codes consisting of a plurality of bits are sequentially increased or decreased.
Stacking individual chips and sequentially increasing or decreasing code values assigned as addresses are used on the assumption that the individual stacked chips have not failed.
However, if at least one of the individual stacked chips has failed, none of the stacked chips may be used. For example, in a semiconductor apparatus which is stacked and packaged into eight layers, if even one individual chip fails, the remaining seven chips cannot be used, which leads to loss of efficiency and productivity.